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  1/10 december 2004  high speed: t pd = 5 ns (typ.) at v cc = 5v  low power dissipation: i cc = 2 a (max.) at t a =25c  compatible with ttl outputs: v ih = 2v (min.), v il = 0.8v (max)  power down protection on inputs & outputs  symmetrical output impedance: |i oh | = i ol = 8 ma (min)  balanced propagation delays: t plh ? t phl  operating voltage range: v cc (opr) = 4.5v to 5.5v  pin and function compatible with 74 series 20  improved latch-up immunity description the 74vhct20a is an advanced high-speed cmos dual 4-input nand gate fabricated with sub-micron silicon gate and double-layer metal wiring c 2 mos technology. the internal circuit is composed of 3 stages including buffer output, which provides high noise immunity and stable output. power down protection is provided on all inputs and outputs and 0 to 7v can be accepted on inputs with no regard to the supply voltage. this device can be used to interface 5v to 3v since all inputs are equipped with ttl threshold. all inputs and outputs are equipped with protection circuits against static discharge, giving them 2kv esd immunity and transient excess voltage. 74vhct20a dual 4-input nand gate figure 1: pin connection and iec logic symbols table 1: order codes package t & r sop 74VHCT20AMTR tssop 74vhct20attr tssop sop rev. 3
74vhct20a 2/10 figure 2: input equivalent circuit table 2: pin description table 3: truth table x : don?t care table 4: absolute maximum ratings absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditi ons is not implied 1) v cc = 0v 2) high or low state table 5: recommended operating conditions 1) v cc = 0v 2) high or low state 3) v in from 0.8v to 2v pin n symbol name and function 1, 9 1a to 2a data inputs 2, 10 1b to 2b data inputs 3, 11 n.c. not connected 4, 12 1c to 2c data inputs 5, 13 1d to 2d data inputs 6, 8 1y to 2y data outputs 7 gnd ground (0v) 14 v cc positive supply voltage abcdy lxxxh xlxxh xxlxh xxxlh hhhhl symbol parameter value unit v cc supply voltage -0.5 to +7.0 v v i dc input voltage -0.5 to +7.0 v v o dc output voltage (see note 1) -0.5 to +7.0 v v o dc output voltage (see note 2) -0.5 to v cc + 0.5 v i ik dc input diode current - 20 ma i ok dc output diode current 20 ma i o dc output current 25 ma i cc or i gnd dc v cc or ground current 50 ma t stg storage temperature -65 to +150 c t l lead temperature (10 sec) 300 c symbol parameter value unit v cc supply voltage 4.5 to 5.5 v v i input voltage 0 to 5.5 v v o output voltage (see note 1) 0 to 5.5 v v o output voltage (see note 2) 0 to v cc v t op operating temperature -55 to 125 c dt/dv input rise and fall time (see note 3) (v cc = 5.0 0.5v) 0 to 20 ns/v
74vhct20a 3/10 table 6: dc specifications table 7: ac electrical characteristics (input t r = t f = 3ns) (*) voltage range is 5.0v 0.5v table 8: capacitive characteristics 1) c pd is defined as the value of the ic?s internal equivalent capacitance which is calculated from the operating current consumption without load. (refer to test circuit). average current can be obtained by the following equation. i cc(opr) = c pd x v cc x f in + i cc /2 (per gate) symbol parameter test condition value unit v cc (v) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. v ih high level input voltage 4.5 to 5.5 222v v il low level input voltage 4.5 to 5.5 0.8 0.8 0.8 v v oh high level output voltage 4.5 i o =-50 a 4.4 4.5 4.4 4.4 v 4.5 i o =-8 ma 3.94 3.8 3.7 v ol low level output voltage 4.5 i o =50 a 0.0 0.1 0.1 0.1 v 4.5 i o =8 ma 0.36 0.44 0.55 i i input leakage current 0 to 5.5 v i = 5.5v or gnd 0.1 1.0 1.0 a i cc quiescent supply current 5.5 v i = v cc or gnd 22020 a + i cc additional worst case supply current 5.5 one input at 3.4v, other input at v cc or gnd 1.35 1.5 1.5 ma i opd output leakage current 0 v out = 5.5v 0.5 5.0 5.0 a symbol parameter test condition value unit v cc (*) (v) c l (pf) t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. t plh t phl propagation delay time 5.0 15 5.0 7.0 1.0 8.0 1.0 8.0 ns 5.0 50 5.5 8.0 1.0 9.0 1.0 9.0 symbol parameter test condition value unit t a = 25c -40 to 85c -55 to 125c min. typ. max. min. max. min. max. c in input capacitance 610 10 10pf c pd power dissipation capacitance (note 1) 15 pf
74vhct20a 4/10 figure 3: test circuit c l =15/50pf or equivalent (includes jig and probe capacitance) r t = z out of pulse generator (typically 50 ? ) figure 4: waveform - propagation delays (f=1mhz; 50% duty cycle)
74vhct20a 5/10 dim. mm. inch min. typ max. min. typ. max. a 1.35 1.75 0.053 0.069 a1 0.1 0.25 0.004 0.010 a2 1.10 1.65 0.043 0.065 b 0.33 0.51 0.013 0.020 c 0.19 0.25 0.007 0.010 d 8.55 8.75 0.337 0.344 e 3.8 4.0 0.150 0.157 e 1.27 0.050 h 5.8 6.2 0.228 0.244 h 0.25 0.50 0.010 0.020 l 0.4 1.27 0.016 0.050 k0 8 0 8 ddd 0.100 0.004 so-14 mechanical data 0016019d
74vhct20a 6/10 dim. mm. inch min. typ max. min. typ. max. a 1.2 0.047 a1 0.05 0.15 0.002 0.004 0.006 a2 0.8 1 1.05 0.031 0.039 0.041 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 d 4.9 5 5.1 0.193 0.197 0.201 e 6.2 6.4 6.6 0.244 0.252 0.260 e1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 bsc 0.0256 bsc k0? 8?0? 8? l 0.45 0.60 0.75 0.018 0.024 0.030 tssop14 mechanical data c e b a2 a e1 d 1 pin 1 identification a1 l k e 0080337d
74vhct20a 7/10 dim. mm. inch min. typ max. min. typ. max. a 330 12.992 c 12.8 13.2 0.504 0.519 d 20.2 0.795 n 60 2.362 t 22.4 0.882 ao 6.4 6.6 0.252 0.260 bo 9 9.2 0.354 0.362 ko 2.1 2.3 0.082 0.090 po 3.9 4.1 0.153 0.161 p 7.9 8.1 0.311 0.319 tape & reel so-14 mechanical data
74vhct20a 8/10 dim. mm. inch min. typ max. min. typ. max. a 330 12.992 c 12.8 13.2 0.504 0.519 d 20.2 0.795 n 60 2.362 t 22.4 0.882 ao 6.7 6.9 0.264 0.272 bo 5.3 5.5 0.209 0.217 ko 1.6 1.8 0.063 0.071 po 3.9 4.1 0.153 0.161 p 7.9 8.1 0.311 0.319 tape & reel tssop14 mechanical data
74vhct20a 9/10 table 9: revision history date revision description of changes 16-dec-2004 3 order codes revision - pag. 1.
74vhct20a 10/10 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod ucts are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectro nics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2004 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com


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